Reduces Mask Costs by up to 50% for 90nm and smaller lithographies

First Program Introduction in the "Science of ASICs" Initiative

MILPITAS, Calif..- April 9, 2007- Open-Silicon, Inc., a fabless semiconductor company providing a reliable, predictable and cost effective alternative to traditional chip design and supply chain models, today announces a multi-layer mask program that offers ASIC customers a new option for cost-effective low and mid-volume ASICs. This introduction is the first in Open-Silicon's Science of ASICs initiative, which will feature a series of technology option additions to the OpenModel.

"Mask costs have received a lot of attention as a primary factor in the rising cost of ASICs. Many companies have tried to address rising mask cost concerns by creating platforms that predefine the metal layers. Multi-layer masks are the first solution that offers a cost-saving option for customers who need a full custom ASIC to differentiate their products in the market" said Dr. Shafy Eltoukhy, Vice President of Manufacturing Operations at Open-Silicon. "Multi-layer masks are particularly cost-effective for companies that need low or medium volumes at 90nm or smaller processes nodes."

Multi-layer masks reduce total mask cost by writing multiple mask layers of the same mask grade onto one reticle.

"The focus of Open-Silicon has always been to dramatically increase the predictability, reliability, and cost-effectiveness of ASICs so that our customers can continue to differentiate their products with custom silicon" said Dr. Naveed Sherwani president and CEO of Open-Silicon. "I am excited to announce our Science of ASICs initiative. The multi-layer mask program is the first of several innovative technology alternatives that we will introduce this year to give ASIC customers cost-effective ASIC solutions."

About Open-Silicon, Inc.
Open-Silicon, Inc. is a fabless ASIC company delivering the most cost-effective, predictable and reliable custom ASIC solution to electronics product customers worldwide. Open-Silicon's OpenMODEL™ is the semiconductor industry's first end-to-end custom ASIC solution based on a revolutionary business model that provides a seamless, low-cost, low risk alternative to traditional models for complex ASIC design and development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

Acquisition enables Open-Silicon to Increase Speed, Power, and Time-to-Market Solutions for ASICs

MILPITAS, Calif.- May 7, 2007 - Open-Silicon, Inc., a fabless semiconductor company delivering a reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announces it has acquired the key intellectual property assets of Zenasis Technology. This acquisition expands Open-Silicon's Science of ASICs initiative.

"The focus of Open-Silicon's standardized design methodology is to address the challenges of complex ASIC design in a disciplined manner to produce cost-effective ASICs, with predictable on-time schedules and reliable working first-time silicon results." said Dr. Naveed Sherwani, president and CEO of Open-Silicon, Inc. "By incorporating this new technology, we will be able to optimize our customer's designs for performance, power, and area, and improve their time to market, which will allow them to differentiate themselves in the market. This is exactly what the ASIC market needs."

Most ASIC implementation tools optimize a design at the standard cell level and physical design levels only. The acquired Zenasis technology will enable Open-Silicon to combine the benefits of increased performance and power through design-specific cell creation by concurrently analyzing and optimizing designs at standard cell, physical and transistor levels. ASIC designs with embedded processor cores can greatly benefit from this technology. By using transistor-level design and analysis techniques, embedded processor cores running at the highest frequencies can be realized. For example, a processor core whose frequency would otherwise limit its applicability to specific markets applications due to performance could now be increased by up to 10% to meet broader markets such as video or communication.

"We are excited about the acquisition of Zenasis' hybrid optimization technology," said Dr. Satya Gupta, vice president of engineering at Open-Silicon. "By incorporating this new technology into our design flow, we will be able to give ASIC customers access to technology enhancements that were previously only available to high-end IDM customers. This technology will help Open-Silicon bridge the performance gap between standard cell based ASIC designs and custom designs."

About Open-Silicon, Inc.
Open-Silicon, Inc. is a fabless ASIC company delivering the most cost-effective, predictable and reliable custom ASIC solution to electronics product customers worldwide. Open-Silicon's OpenMODEL™ is the semiconductor industry's first end-to-end custom ASIC solution based on a revolutionary business model that provides a seamless, low-cost, low risk alternative to traditional models for complex ASIC design and development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

Synopsys DFT MAX Chosen as a Key Ingredient of a Cost-Effective Test Strategy

MOUNTAIN VIEW, Calif.-May 17, 2007-Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that Open-Silicon, a leading supplier of predictable, reliable and cost-effective ASIC solutions, has adopted Synopsys' DFT MAX scan compression solution to substantially reduce the cost of testing ASICs. DFT MAX lowers test costs by significantly reducing the amount of time and data required to test digital circuits. Open-Silicon requires scan compression solutions for 130-, 90- and 65-nanometer (nm) designs that are easy to implement and have minimal impact on their established design flows. Using DFT MAX, Open-Silicon's design team easily achieved a 90-percent test application time reduction for scan testing. The ease of implementation and predictable results solidified Open Silicon's decision to adopt DFT MAX for use with its existing Galaxy Design Platform flows.

"Optimizing costs is a key element to the success of our OpenMODEL," said Dr. Satya Gupta, vice president of Engineering at Open-Silicon. "We carefully evaluated many different aspects of the Synopsys DFT MAX scan compression solution, from the way it performed with different compression parameters to its effect on downstream flows and fault coverage. In all aspects, DFT MAX produced results to our satisfaction: the tool substantially reduced test time and test data volume with very low gate/routing area and timing impact. We anticipate these capabilities will yield significant benefits for our customers."

DFT MAX utilizes advanced scan compression technology to substantially reduce both test application time and test data volume compared with traditional scan techniques. DFT MAX's key advantage is that it is easy to implement and is far less intrusive on design flows and design performance than alternative methods. Fragmented, bolt-on flows requiring separate design synthesis and test compression insertion steps can break critical timing, add routing congestion and necessitate subsequent re-optimization. In contrast, DFT MAX is integrated with the Galaxy RTL, physical and sign-off design flows to help eliminate costly, time-consuming design iterations between synthesis and physical implementation. Simultaneously, designers can achieve convergence of timing, power, area and test.

"Today, successful fabless ASIC companies are differentiated by their ability to embed high reliability into their products while remaining competitive on price," said Graham Etchells, director of Test Automation Marketing at Synopsys. "Open-Silicon's decision to adopt DFT MAX is a clear indication that Synopsys has the portfolio of products and solutions to enable our customers to meet these challenges and achieve their business goals."

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company delivering the most cost-effective, predictable and reliable custom ASIC solution to electronics product customers worldwide. Open-Silicon's OpenMODEL™ is the semiconductor industry's first end-to-end custom ASIC solution based on a revolutionary business model that provides a seamless, low-cost, low-risk alternative to traditional models for complex ASIC design and development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com.

Synopsys and Galaxy are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.

MILPITAS, Calif.--December 3, 2007-- Open-Silicon, Inc., a fabless semiconductor company providing a reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, announced today that Dr. Naveed Sherwani has been elected to a 3 year term on the board of directors of the Global Semiconductor Alliance (GSA), formerly known as the Fabless Semiconductor Association. The Board of Directors includes 20 executives selected by the Alliance's semiconductor members.

"Dr. Sherwani brings the unique perspective of an executive who has served the industry in the educational realm as a professor and textbook author, worked for a large semiconductor company, and as an entrepreneur who has founded two successful fabless semiconductor companies to his position on the board of directors for the GSA.

"I am honored by the confidence my industry peers demonstrated by electing me to this board" said Dr. Naveed Sherwani. "I am excited about the opportunity to leverage my technical expertise and innovative business ideas to help shape the focus of the GSA on evolving the IC supply chain into an open model that drives accelerated growth."

About Dr. Naveed Sherwani

Dr. Sherwani has over 20 years of experience in technical engineering and general management and currently serves as the President and CEO of Open-Silicon, which he founded to bring cost-effectiveness, predictability and reliability to the ASIC market. Prior to founding Open-Silicon, Dr. Sherwani was the founder and General Manager of Intel Microelectronics Services, where he led efforts to promote the use of disciplined ASIC methodologies to improve design efficiency and time-to-market. Naveed currently serves on the Board of Directors of Integration and the Technical Advisory Board for Pyxis Technology. Naveed served as a Professor at Western Michigan University and is the author of the main textbook on Physical Design, "Algorithms for VLSI Physical Design Automation," which is widely used at major universities around the world. Dr. Sherwani received his Ph.D from the University of Nebraska-Lincoln.

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability, and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

Open-Silicon delivers the "Science of ASICs" to a wide range of customers

MILPITAS, Calif. - October 18, 2007- Open-Silicon, Inc., a fabless ASIC company providing a reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, announced today that it has passed a major milestone and crossed the 100 Design Win threshold.

These worldwide wins include designs for customers in a wide spectrum of industry segments including wireless and mobile, consumer, digital entertainment, computing, storage and networking, security, and telecommunications. This includes early 0.25um and 0.13um wins from 2003, to more recent
90nm, 65nm and even 45nm design wins. More than 35 of the design wins have been for large public companies worldwide.

"Open-Silicon has been an agent for change in the ASIC market from the moment they launched their innovative business model," stated Pierre Lamond of Sequoia Capital. "Their ability to book 100 design wins in four years is a testament to the market's need for highly predictable and reliable custom silicon. Open-Silicon's skill at delivering on their customer's critical time-to-market requirements is what makes them one of the fastest growing companies in the market."

"Open-Silicon has had incredible growth over the past four years," said Dr. Naveed Sherwani, president and CEO of Open-Silicon. "By bringing freedom of choice to the traditionally inflexible chip supply chain, we have enabled electronics products customers worldwide to differentiate their products with custom silicon -- and ultimately increase their chances for success in the market."

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability, and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon"s website at www.open-silicon.com or call 408-240-5700.

MOUNTAIN VIEW, Calif.-June 24, 2008-- MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, and Open-Silicon, Inc., a fabless ASIC company providing a reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announced they are teaming to enable chip design companies to get their custom ASIC designs to market faster than ever before.

Through the agreement, Open-Silicon gains access to a wide array of optimized and synthesizable MIPS32® cores, and the knowledge gained through leveraging the cores in multiple designs. Open-Silicon customers can select the core that is right for their design, from low-power cores for next-generation mobile devices to multi-threaded cores that boost system performance while reducing SoC die area, cost, and power consumption for today's converged devices. With proven IP and Open-Silicon's design and integration expertise, customers can get differentiated products to market quickly and easily at the lowest possible cost.

"Selecting and integrating quality IP is rapidly becoming the biggest challenge for ASIC designers, who need IP that differentiates their product and will function as promised for first-time working silicon," said Scott Houghton, vice-president, Open-Silicon. "We offer customers freedom of choice for their ASIC designs - giving them the best possible solutions at each step of the development process. MIPS Technologies has some of the best IP solutions available for the digital home and beyond, and we are pleased to offer customers the confidence that comes from our experience with a range of proven MIPS® cores."

"Open-Silicon is a unique company offering an end-to-end solution for ASIC development helping customers reduce development time and costs," said Brad Holtzinger, vice president of sales, MIPS Technologies. "We are pleased that Open-Silicon has reaffirmed its commitment to MIPS-Based™ solutions by integrating a broad selection of our cores into its pre-qualified IP portfolio. Its customers will benefit from the distinct advantages offered by MIPS cores for their next-generation electronic products."

MIPS Technologies cores are key components of Open-Silicon's OpenMODEL, which provides customers with access to qualified processor IP, manufacturing, test, and packaging providers. The OpenMODEL allows customers to make informed choices at each step of the development cycle to minimize risk, lower costs and boost end product integrity. Open-Silicon's design methodology is then applied to produce reliable, predictable ASICs at significantly lower cost.

About Open-Silicon, Inc.

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability, and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

About MIPS Technologies, Inc.

MIPS Technologies, Inc. (NasdaqGS: MIPS) is the world's second largest semiconductor design IP company and the number one analog IP company worldwide. With more than 250 customers around the globe, MIPS Technologies is the only company that provides a combined portfolio of processors, analog IP and software tools for the embedded market. The company powers some of the world's most popular products for the digital entertainment, home networking, wireless, and portable media markets including broadband devices from Linksys, DTVs and digital consumer devices from Sony, DVD recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco, 32-bit microcontrollers from Microchip Technology and laser printers from Hewlett-Packard. Founded in 1998, MIPS Technologies is headquartered in Mountain View, California, with offices worldwide. For more information, contact (650) 567-5000 or visit www.mips.com.

MILPITAS, CA-July 8, 2008: Open-Silicon, Inc., a fabless semiconductor company providing a reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announced that Chris King has joined its Board of Directors.

Ms. King has served as the CEO of AMIS Semiconductor (recently acquired by ON Semiconductor), taking the company public in September 2003. She led AMIS through six acquisitions during her tenure. Prior to joining AMIS, King was vice-president of Semiconductor Products for IBM's Microelectronics Division and launched the company's ASIC business in 1993 growing it to the number one ASIC business in the world. In addition to her Board seat at Open-Silicon, Ms. King serves on the Boards of Atheros Communications, Inc. (NASDAQ: ATHR), Idaho Power Company, an IDACORP company (NYSE: IDA) and ON Semiconductor (NASDAQ: ONNN).

"Open-Silicon has established a reputation as an agent of change in the ASIC market and we have had phenomenal growth in our first four years of business. Chris's experience and leadership as a pioneer in the ASIC industry will help us to accelerate our next phase of growth and offer our customers even more compelling solutions," stated Dr. Naveed Sherwani, CEO and president of Open-Silicon.

"I have been impressed with the impact that Open-Silicon's innovative business model has had on the ASIC market and I look forward to working with Naveed and the rest of the Open-Silicon board," remarked Chris King.

About Open-Silicon, Inc.

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability, and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, CA-July 29, 2008: Open-Silicon, Inc., the leading fabless ASIC company providing the most reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announced the hiring of four key personnel. Joining Open-Silicon are William J. DeWilkins, director of test, Al Di Cicco, senior director of sales, Cyrus Fathi, director of quality and reliability, and Robert Fulton, senior staff IP applications engineer.

"We've built our leadership by delivering successful, efficient, cost effective ASIC designs on time and based on an open model," said Dr. Naveed Sherwani, CEO and president of Open-Silicon. "Our ongoing growth and success is a testament to our technical expertise and patents in both front and back end design. These new hires support our commitment to technical leadership."

DeWilkins has been involved in managing global test engineering teams for over 15 years, defining and implementing technical support and customer training. DeWilkins managed his own test consulting firm and held positions with Agilent, National Semiconductor, and others. This included coordination and management of the customer facing account teams.

Di Cicco brings 25 years experience in ASICs, ASSPs and subsystem sales, with a strong focus in storage. He has held senior sales management and business development positions at Agere Systems, LSI, and most recently PMC-Sierra. Di Cicco has worked with a majority of the storage semiconductor industry leaders, focused on Fibre Channel, SAS, SATA and Infiniband platform development.

Fathi has a strong technical background spanning 19 years in Operations, Product & Test Engineering. He has worked on a number of cutting-edge products, from high-volume, low-margin memory chips and modules, to highly complex SOC chips implementing a variety of technologies, including non-volatile and volatile memories and high-speed microprocessors. Fathi has held positions at Altierre Corp, Raza Microelectronics, Alliance Semiconductor, and Altera Corp.

Fulton is well known for his work on SerDes and brings 26 years of technology expertise to the Open-Silicon team. He has an in-depth knowledge of and experience in data communications, digital/analog electronic design, embedded processor hardware and software, high-speed serial technologies and a number of standards and protocols. Fulton has held positions with leading semiconductor companies such as AT&T, Lucent Microelectronics, Agere Systems, LSI Corp, Global Village Communication Inc. and US Robotics.

About Open-Silicon, Inc.

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, CA-September 10, 2008: Open-Silicon, Inc., the leading fabless ASIC company providing the most reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announced completion of the 100th tapeout. The company, founded in 2003, reached this historic milestone in only the fifth year of operations.

"One hundred tapeouts within five years is a tremendous accomplishment and one that few other ASIC companies have achieved," said Naveed Sherwani, CEO and president. "While we continue to attract new customers and expand into new markets, it's significant to note that many of our customers are taping out their second or even third designs with us. This is a testament to the technical expertise of our design teams, our ability to complete designs on time with first-pass silicon success and our excellent customer service."

"Strong worldwide demand for Open-Silicon's technology in the advanced process nodes, in particular 65nm and 45nm, will drive our continued rapid growth in 2009 and beyond," said Chitra Hariharan, senior director of engineering. "We are aggressively investing in our engineering methodology and technology infrastructure so that customers moving to 45nm will continue to enjoy the same industry-leading predictability and reliability as our current 90nm and 65nm customers."

About Open-Silicon, Inc.

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Through the "Science of ASICs" initiative, Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, CA - November 12, 2008: Open-Silicon, Inc., the leading open market semiconductor manufacturer and provider of spec-to-silicon ASIC design services, today announced the introduction of three new MAX technologies to address design issues common to the 65nm and 40nm process nodes. Depending on each customer's needs Open-Silicon will use the PowerMAX™, CoreMAX™, and VariMAX™ technologies to build better custom silicon by designing in lower power, increased performance and managed process variability.

"The new MAX technology provides tremendous power and performance optimization advantages to our customers' products, regardless of the complexity of their designs," said Dr. Satya Gupta, VP engineering and co-founder, Open-Silicon. "By combining the ASIC industry's only transistor-level optimization flow with techniques like back biasing, which are new to the ASIC space, Open-Silicon can build the best possible fully custom silicon in smaller process geometries."

About MAX Technology

CoreMAX was created to build the fastest processor cores in the ASIC world. The CoreMAX technology comes out of the Open-Silicon acquisition of Zenasis Technologies in 2007 and uses over two million lines of C++ software and several patented techniques to move beyond the limitations of traditional library-based ASIC design. Built-in CoreMAX functions include design Boolean analysis and optimization, static timing, cell placement, route estimation, and simultaneous optimization at the logical, physical, and transistor levels. Based on the needs of each critical path in the design, CoreMAX may change cells, move cells, or even create new cells on-the-fly, performing a library-compatible layout for each new cell and characterizing these cells for use throughout the EDA environment. The new cells offer unique drive strengths and functionality that enable maximum device performance.

VariMAX addresses increasing process variability. Traditional approaches to variation management involve increased design margins and a large number of extraction and analysis corners. These approaches struggle in technologies like 65nm and 40nm where performance and leakage vary widely across a population of otherwise good devices. In order to manage this, Open-Silicon has implemented a back biasing design approach where the bulk transistor node voltage is controlled so that fast, leaky parts are reined in by adaptive calibration of the silicon.

PowerMAX enables design for the lowest possible power. Open-Silicon has already completed state-of-the-art 65nm designs using power savings methods like low-power place-and-route, voltage islands, power gating, clock gating, and multi-Vt. PowerMAX adds to this foundation with four new technologies: transistor level transformations, back biasing, power recovery, and custom leakage signoff. PowerMAX's transistor level optimization creates new standard cells on-the-fly to drive down both dynamic and leakage power. In addition to its variability control value, back biasing can also be employed whenever devices enter standby mode to further throttle back leakage power and prolong battery life. Power recovery operates late in the design phase to find timing paths with extra timing margin and replace cells with either higher Vt or lower drive strength equivalents. Finally, with custom leakage signoff Open-Silicon characterizes cell library leakage throughout the temperature range and then uses the actual design junction temperature for the leakage power calculation. Since the leakage power doubles every 15 degrees C, this is required for accurate power estimation.

All three products are already silicon proven, or, as is the case with back biasing, currently in fab. All products are available for design use today.

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Open-Silicon provides leading edge ASIC design, open market IP integration, and high quality silicon manufacturing services to customers worldwide. Through the "Science of ASICs" initiative Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, CA-October 30, 2008: Open-Silicon, Inc., the leading open market semiconductor manufacturer and provider of spec-to-silicon ASIC design services, today announced that the Company posted its strongest quarter to date in Q3 2008. In addition to strong year on year revenue growth of 49%, YTD bookings were up 47% year on year. Also, YTD design wins grew over 60% compared to the same period in 2007. Since being founded in 2003, Open-Silicon has built a customer base of over 80 customers and taped out more than 100 designs.

"Our business and financial achievements are a testament to our business model and our ability to address the needs of our customers," said Dr. Naveed Sherwani, Open-Silicon president and CEO. "We will continue our success by providing our customers with the products and services needed to support their innovative, next generation designs."

"Today's customers benefit from Open-Silicon's low costs and disciplined approach to predictability and reliability," said Colin Baldwin, Open-Silicon director of marketing. "In addition, more and more customers also are finding unique value in our leadership technology in the areas of low power and high performance design."

About Open-Silicon, Inc.

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Open-Silicon provides ASIC design, open market IP integration, and silicon manufacturing services to customers worldwide. Through the "Science of ASICs" initiative Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, Calif.-January 28, 2009: Open-Silicon, Inc., the leading open market semiconductor manufacturer and provider of spec-to-silicon ASIC design services, today announced successful completion of two complex ASIC designs. The designs, which included large numbers of integrated high-speed serializer/deserializer (SerDes) cores, demonstrate Open-Silicon's high-end digital IC design capabilities and ability to integrate complex open market IP. While Open-Silicon has worked on a total of 30 ASICs with SerDes to date, the high lane count of these two recently completed devices made them particularly challenging in the areas of timing closure, package design, test, and physical design for signal integrity.

The first chip, which is not yet announced, integrated over 50 SerDes for a networking application. An additional challenge was imposed by the addition of high speed DDR2 interfaces. To handle all the high-speed IO requirements this chip was packaged in a custom HFCBGA package.

The second of the chips is a Parallel Graphics Unit for gaming and computing designed with LucidLogix Technologies. This ASIC serves as a scalable graphics component connecting a main computer processor to multiple GPUs. A 12-quad 48-channel 2.5Gbps PCIe SerDes network is used to divide graphics processing work among several graphical processing units (GPUs). On this device the PCI Express lanes were spread evenly on all four sides of the die to facilitate use of low-cost wirebond packaging. As a single reference clock feeds all 48 lanes, a novel clock buffer ring was built outside the chip's bond pads to isolate the clock from on-chip noise. Due to the high numbers of SerDes lanes, both designs required careful attention to:

1. Co-design of custom package with die physical design
2. Physical design taking into account the macro placements and signal interactions at very high speeds
3. Extensive SPICE level analysis of critical paths to analyze timing and cross-talk for the large number of SerDes lanes
4. Careful design of power sources to bring power to the macros
5. Verification early in the design phase that the SerDes DFT structures and Automated Test Equipment (ATE) will be able to provide complete and accurate test for production

"High-end 3D graphics processing depends on silicon solutions that require a high degree of design expertise," said Offir Remez, President and Vice President of Business Development for Lucid Information Technologies. "The Open-Silicon design team tackled our tough chip requirements and met our specifications."

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Open-Silicon provides leading edge ASIC design, open market IP integration, and high quality silicon manufacturing services to customers worldwide. Through the "Science of ASICs" initiative Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

About Lucid

LucidLogix Technologies is reinventing multi-core graphics with its HYDRA real-time distributed processing engine that will exponentially improve visual computing for both business and gaming applications. Lucid is a fabless SoC provider headquartered in Kfar Netter, Israel. For more information, visit www.lucidlogix.com.

MILPITAS, Calif.-December 15, 2008: Open-Silicon, Inc., the leading open market semiconductor manufacturer and provider of spec-to-silicon ASIC design services, today announced it has won the Global Semiconductor Alliance (GSA) award for the industry's "Most Respected Private Semiconductor Company."

The GSA presents this award annually to the private company most respected in terms of products, vision and future opportunity. Recent previous winners of this award include NVIDIA, Marvell and Atheros Communications, among others. The award process consists of nomination by a GSA committee of industry experts and then final selection by the semiconductor community, including semiconductor financial and industry analysts and suppliers.

"We are honored that our peers have recognized our leadership and our commitment to product excellence now and in the future," said Naveed Sherwani, Open-Silicon president and CEO. "We attribute our success to our business model, our people, our relationships with customers and our ability to deliver on our strategy to bring cost-effectiveness, predictability and reliability back to the ASIC market."

"We are pleased to present Open-Silicon, Inc. with the Most Respected Private Semiconductor Company Award for their hard work and innovation," said Jodi Shelton, co-founder and executive director of GSA. "It is a great honor to receive this recognition from your peers in the industry."

About Open-Silicon

Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Open-Silicon provides leading edge ASIC design, open market IP integration, and high quality silicon manufacturing services to customers worldwide. Through the "Science of ASICs" initiative Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

MILPITAS, Calif.-January 13, 2009 : Open-Silicon, Inc., the leading open market semiconductor manufacturer and provider of spec-to-silicon ASIC design services, today announced a MAX licensing agreement with Brite Semiconductor, an ASIC company based in Shanghai.

Open-Silicon's MAX technology, announced in November of 2008, addresses design issues common to the 65nm and 40nm process nodes. Depending on customer needs, Brite Semiconductor's Shanghai design center will implement the PowerMAX™, CoreMAX™, and VariMAX™ technologies to build customized silicon with increased performance, managed process variability and lower power.

"The new MAX technology provides tremendous power and performance optimization advantages for our customers' products, regardless of the complexity of their designs," said Charlie Zhi, CEO of Brite Semiconductor. "Design companies in China are moving aggressively to leading-edge technologies. No other ASIC company will be able to offer these advanced design benefits to their China-based customers."

"MAX has been tremendously successful in allowing customers to build the best possible, fully custom silicon for customers' designs or products in smaller process geometries," said Scott Houghton, VP marketing and business development, Open-Silicon. "Brite will be able to enhance its customers' products by taking advantage of the ASIC industry's only transistor-level optimization flow and techniques like adaptive back biasing, which are new to the ASIC space."

About MAX Technology

CoreMAX was created to build the fastest processor cores in the ASIC world. The CoreMAX technology uses over two million lines of C++ software and several patented techniques to create new cells on-the-fly that are optimized at the transistor level for maximum performance. VariMAX addresses increasing process variability through use of a back biasing design approach where the bulk transistor node voltage is controlled so that fast, leaky parts are reined in by adaptive calibration of the silicon. PowerMAX enables design for the lowest possible power. PowerMAX adds to existing physical design techniques with four new technologies: transistor level transformations, back biasing, power recovery, and custom leakage signoff.

About Open-Silicon

Open-Silicon, Inc. provides leading edge ASIC design, open market IP integration, and high quality silicon manufacturing services to customers worldwide. Open-Silicon was founded to set new standards for the predictability and reliability of ASICs and enable customers to differentiate their products through affordable custom silicon. Through the "Science of ASICs" initiative Open-Silicon continues to introduce technology advantages that help customers increase their market success. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

About Brite Semiconductor

Brite Semiconductor Corporation is a fabless ASIC company headquartered in Shanghai. Brite Semiconductor uses proven design flows and methodologies and advanced design capabilities to provide end-to-end custom ASIC solutions including a complete turnkey service. This engineering strength is partnered with a proven business model that provides a seamless, cost effective, and low risk solution for complex ASIC design and development. For more information, please visit www.britesemi.com.

High-Bandwidth Interlaken IP Ideal for Networking, Security and Content Processing Applications

MILPITAS, Calif. - July 9, 2012: Open-Silicon, Inc., a leading semiconductor design and manufacturing company and charter member of the Interlaken Alliance, announced today that Netronome, the leading developer of flow processors, has selected Open-Silicon's Interlaken IP core for its next-generation flow processors. Chosen because the IP core supports Interlaken look-aside protocol and standard Interlaken protocol within a single IP instance, it also offered flexible SerDes lane mapping between the logical and physical SerDes lanes. With over 35 successful licenses, the Open-Silicon Interlaken core provides the industry's fastest chip-to-chip interface by supporting SerDes data rates up to 28Gbps and multiple data width options.

"Open-Silicon's Interlaken IP core met the necessary requirements for Netronome's next generation flow processor and was easily integrated into our next-generation processor, even with the customization that we required," said Jim Finnegan, Senior VP Development, Netronome. "Open-Silicon's support for our requirements and customizations has surpassed our expectations."

The Interlaken protocol is an integral part of today's leading edge data networking products, enabling fast, scalable, and low-latency chip-to-chip communication for switching, routing, and deep packet processing applications. Architected to be easily synthesizable into many ASIC technologies, Open-Silicon's Interlaken IP core is uniquely built to work with off-the-shelf SerDes from leading technology vendors. This support for multiple industry-leading SerDes PHYs allows Open-Silicon's customers to quickly integrate the core into their technology of choice.

"We have seen tremendous adoption of Open-Silicon's Interlaken IP core across applications like network switches, routers and storage equipment. Working with Netronome on its next generation flow processors utilizing advanced foundry technology has demonstrated the inherent capability and flexibility of our IP core," said Steve Erickson, VP of IP and Platforms, Open-Silicon.

About Netronome Flow Processors
Netronome's flow processors (NFP) bring breakthrough performance to a broad range of demanding network, security and content processing applications used in high-end networks with speeds up to 400Gbps. NFPs simultaneously deliver packet processing with deep packet inspection, security processing, and I/O virtualization for millions of simultaneous stateful flows. NFPs are the industry's only processor specifically designed for tight coupling with Intel Architecture (IA) processors, complementing and strengthening the growing success of IA in networking, communications, and security applications.

About Open-Silicon, Inc.
Open-Silicon is a leading semiconductor company focused on SoC realization for traditional ASIC, develop-to-spec, and derivative ICs. In support of the industry trend towards collaborative engineering and design-lite, Open-Silicon offers SoC architecture, system design, physical design, IP, system software, and high-quality semiconductor manufacturing services with one of the world's broadest partner ecosystems for IC development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

Co-developed Ethernet IP Speeds 40G and 100G Networking IC Development

MILPITAS, Calif. -August 29, 2012: Open-Silicon, Inc., a leading semiconductor design and manufacturing company, today announced the launch of a 40G/100G Ethernet media access controller (MAC) IP and 40G/100G physical coding sublayer (PCS) IP, co-developed with CoMira Solutions, Inc. The co-developed IP, sold by Open-Silicon as stand-alone IP or as a part of an Open-Silicon customer-specific product development, is compliant with the IEEE 802.3ba standard. When combined with Open-Silicon's industry-leading Interlaken, Hybrid Memory Cube (HMC) or DDR3 controllers, the high-performance Ethernet IP offers a complete IP solution for networking applications.

The co-development model brings together CoMira's depth of expertise with high speed Ethernet technology and Open-Silicon's broad experience in IP qualification and integration to create a rigorous design, verification, and qualification process. For these two cores, this design and verification process includes FPGA emulation, documentation review, UNH compliance testing, and comprehensive timing and functional verification. For qualification, prior to release all Open-Silicon IP cores go through Open-Silicon's IP qualification process, which has been developed and continually enhanced through the successful integration of over 900 IP cores.

"Our customers have been asking for high quality leading edge Ethernet IP for their next generation products, including Ethernet 40G/100G MACs," said Steve Erickson, vice president & GM IP and Platform Development, Open-Silicon. "By partnering with CoMira, we are able to offer a full, low risk solution to help customers get to market faster."

"Today's chip designers and suppliers face significant challenges integrating an increasingly disparate collection of third-party IP," said Qasim Shami, president and CEO of CoMira Solutions. "By co-developing our IP with Open-Silicon, our customers will benefit from a more tightly-coupled IP & silicon development platform, enabling a higher degree of predictability and faster time to market."

The 40G/100G MAC and PCS are highly modular enabling system level solutions from 10G to 100G, and are ideal for low-latency applications such as data center switches where higher performance is required. The small footprint implementation leads to lower gate counts and smaller die sizes, which allow for an efficient design in high-port count devices. Built on a highly configurable architecture supporting a number of different SerDes configurations and user interface options, the 40G/100G MAC and PCS IP cores can be quickly tuned to meet user requirements. Comprehensive system-level verification and automated infrastructure, including a web-based IP builder, allows for quick trade-off analysis and system-level integration.

Open-Silicon Co-developed IP
Open-Silicon co-developed IP includes the customization and qualification that all IP requires. In addition, Open-Silicon provides a sales and marketing channel and customer support to enable rapid integration of the IP core into today's designs. For more information, contact Open-Silicon at +1-408-240-5700 or IP@open-silicon.com.

About Open-Silicon, Inc.
Open-Silicon a leading supplier and developer of customer-specific products (CSPs) leveraging the industry's best technology from both Open-Silicon and the open market. Developing customized solutions for each program including ASIC spec-to-parts, IP and platforms, Open-Silicon provides customers with fast access to leading edge product development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

About CoMira Solutions
CoMira Solutions is an expert provider of application optimized semiconductor IP and full turn-key ASIC design services. Lead by a veteran team of SoC developers, CoMira leverages its deep system knowledge to deliver high value, differentiated IP solutions for the Networking, Storage, and Wireless markets. For more information, visit CoMira's website at www.comira-inc.com.